This disclosure relates to data processing and storage, and more specifically, to data storage systems, such as flash-based data storage systems, that employ techniques to expand the effective storage capacity of the data storage systems while providing support for recovery of address mapping information.
NAND flash memory is an electrically programmable and erasable non-volatile memory technology that stores one or more bits of data per memory cell as a charge on the floating gate of a transistor or a similar charge trap structure. In a typical implementation, a NAND flash memory array is organized in blocks (also referred to as “erase blocks”) of physical memory, each of which includes multiple physical pages each in turn containing a multiplicity of memory cells. By virtue of the arrangement of the word and bit lines utilized to access memory cells, flash memory arrays can generally be programmed on a page basis, but are erased on a block basis.
Data storage systems, including those employing NAND flash media, commonly employ either hardware-based or software-based techniques, such as data compression and deduplication, to increase the effective storage capacity of a given storage system. The present disclosure appreciates that some prior art techniques of increasing the effective storage capacity of a data storage system make recovery difficult in the presence of certain types of failures, such as corruption of logical-to-physical address mappings.